This is the best time for professionals working in computer architecture, compilers, and fundamental system software.
Mission
Jiachen Project aims to realize a mature RISC-V’s hardware and software ecosystem surpass to all other mainstream ISAs before 2036, the next year of Loong. This means mainstream-level maturity in applications such as datacenters, desktop computing, wearable technologies, and Internet of things - all implemented with systems of open ISA standards and open source system software stacks.
The Mission is broken down into three core objectives for a zodiac cycle.
Objective A
Bringing a joint effort of over 100 chip companies and solution makers and over 500 software development firms, in order to port, optimize, and deliver ≥1,000 key commercial software packages across ≥18 key & fundamental industries. Ensure that every important commercial software application supports RISC-V.
联合100家以上芯片及方案厂商、500家以上软件企业，在18个以上基础关键行业领域完成面向RISC-V的适配与优化，合作完成超过 1000 款重要行业及商业软件的移植与部署。确保每一款重要的商业软件都支持RISC-V。
Objective B
We help the industry develop commercially viable, deployable industry solutions based on RISC-V, including but not limited to areas such as AI acceleration, edge computing, storage, robotics, industrial simulation, and medical assistance. Ensure that every industry solution has a RISC-V alternative.
帮助业界完成基于RISC-V的、可以商业交付落地的行业解决方案，包括并且不限于AI加速、边缘计算、存储、机器人、工业仿真、医疗辅助等领域。确保每种行业解决方案都有基于 RISC-V 架构的替代方案。
Objective C
Establish a RISC-V talent recognition system, connecting over 10,000 professionals with expertise in RISC-V chip design, software development, community management, and education and training, to achieve mutual recognition and collaboration in the RISC-V talent field.
建立RISC-V人才识别体系，连接超过1万名具备RISC-V芯片设计、软件开发、社区运营、教育培训专业人才，实现RISC-V人才领域的互认合作。